Thin film field effect transistors (TFT) used in liquid crystal display (LCD) applications typically use amorphous silicon (a-Si:H) as the semiconductor and silicon oxide and/or silicon nitride as the gate insulator. Recent developments in materials have led to the exploration of organic oligomers such as hexathiophene and derivatives, and organic molecules such as pentacene (G. Horowitz, D. Fichou, X. Peng, Z. Xu, F. Garnier, Solid State Commun. Volume 72, pg. 381, 1989; F. Garnier, G. Horowitz, D. Fichou, U.S. Pat. No. 5,347,144) as potential replacements for amorphous silicon as the semiconductor in thin-film field-effect transistors.
The highest field effect mobility in thiophene-oligomer-based TFT's is usually about 0.06 cm.sup.2 V.sup.-1 sec.sup.-1 (F. Garnier, R. Hajlaoui, A. Yassar, P. Srivastava, Science, Volume 265, pg. 1684, 1994), which is substantially lower than the mobility of standard a-Si:H TFT's. Only in the case that the organic insulator cyanoethylpullulane was used, was a higher field effect mobility measured (0.4 cm.sup.2 V.sup.-1 sec.sup.-1, F. Garnier, G. Horowitz, D. Fichou, U.S. Pat. No. 5,347,144). However, that insulator exhibits some undesirable characteristics such as inferior dielectric strength, mobile charges, (G. Horowitz, F. Deloffre, F. Gamier, R. Hajlaoui, M. Hmyene, A. Yassar, Synthetic Metals, Volume 54, pg 435, 1993) and sensitivity to humidity. Hence it is not suitable for use as a gate insulator in the fabrication of practical TFT devices.
Field effect mobility up to 0.6 cm.sup.2 V.sup.-1 sec.sup.-1 has recently been achieved in pentacene based TFT's with SiO.sub.2 as the gate insulator (Y. Y. Lin, D. J. Gundlach, T. N. Jackson, 54.sup.th Annual Device Research Conference Digest, 1996 pg. 80), making them potential candidates for such applications. Major drawbacks of these pentacene-based organic TFT's are high threshold voltage, high operating voltages required to achieve high mobility and simultaneously produce high current modulation (typically about 100 V when 0.4 .mu.m thick SiO.sub.2 insulator is used), and high sub-threshold slope, S, which is approximately 14 V per decade of current modulation (Y. Y. Lin, D. J. Gundlach, T. N. Jackson, 54.sup.th Annual Device Research Conference Digest, 1996, pg. 80) as compared to about 0.3 V per decade of current modulation achieved in a-Si:H based TFT's (C.-Y. Chen, J. Kanicki, 54.sup.th Annual Device Research Conference Digest, 1996, pg. 68). Reducing the thickness of the gate insulator would improve the above mentioned characteristics but there is a limit to the decrease of the insulator thickness, which is imposed by ease of manufacturing and reliability issues. For example in the current generation of TFT LCD devices the thickness of the TFT gate insulator is typically 0.4 .mu.m.
The electrical characteristics of TFT's having pentacene as the semiconductor, a heavily doped Si-wafer as the gate electrode, thermally grown SiO.sub.2 on the surface of the Si-wafer as the gate insulator, and Au source and drain electrodes, are adequately modeled by standard field effect transistor equations (S. M. Sze "Physics of Semiconductor Devices", Wiley, New York, 1981, pg. 442), as shown previously (G. Horowitz, D. Fichou, X. Peng, Z. Xu, F. Garnier, Solid State Commun. Volume 72, pg. 381, 1989; C. D. Dimitrakopoulos, A. R. Brown, A. Pomp, J Appl. Phys. Volume 80, pg. 2501, 1996). The pentacene used in these devices behaves as a p-type semiconductor. FIG. 1, cited from Y. Y. Lin, D. J. Gundlach, T. N. Jackson, 54.sup.th Annual Device Research Conference Digest, 1996pg. 80, shows the dependence of the current flowing between the source and drain electrodes (I.sub.D) on the voltage applied to the drain electrode (V.sub.D), at discrete voltages applied to the gate electrode (V.sub.G). When the gate electrode is biased negatively with respect to the grounded source electrode, pentacene-based TFT's operate in the accumulation mode and the accumulated carriers are holes. At low V.sub.D, I.sub.D increases linearly with V.sub.D (linear region) and is approximately given by the equation: ##EQU1## where L is the channel length, W is the channel width, C.sub.i is the capacitance per unit area of the insulating layer, V.sub.T is a threshold voltage, and .mu. is the field effect mobility. .mu. can be calculated in the linear region from the transconductance: ##EQU2## by plotting I.sub.D vs. V.sub.G at a constant low V.sub.D and equating the value of the slope of this plot to g.sub.m.
When the drain electrode is more negatively biased than the gate electrode (i.e. -V.sub.D .gtoreq.-V.sub.G), with the source electrode being grounded (i.e. V.sub.s =0), the current flowing between source and drain electrodes (I.sub.D) tends to saturate (does not increase any further) due to the pinch-off in the accumulation layer (saturation region), and is modeled by the equation: ##EQU3##
FIG. 2a shows the dependence of I.sub.D on V.sub.G in saturation (Y. Y. Lin, D. J. Gundlach, T. N. Jackson, 54.sup.th Annual Device Research Conference Digest, 1996, pg. 80). The field effect mobility can be calculated from the slope of the .sqroot..vertline.I.sub.D .vertline. vs. V.sub.G plot. FIG. 2b shows a plot of the square root of I.sub.D vs V.sub.G. A mobility of 0.62 cm.sup.2 V.sup.-1 sec.sup.-1 can be calculated from this plot. The sub-threshold slope, S, is approximately 14 volts per decade of current modulation (Y. Y. Lin, D. J. Gundlach, T. N. Jackson, 54.sup.th Annual Device Research Conference Digest, 1996, pg. 80).